HM51S4260C Datasheet | Hitachi Semiconductor

Description The Hitachi HM51(S)4260C is CMOS dynamic RAM organized as 262,144-word × 16-bit. HM51(S)4260C has realized higher density, higher performance and various functions by employing 0.8 µm CMOS process technology and some new CMOS circuit design technologies. The HM51(S)4260C offers fast page mode as a high speed access mode. Multiplexed address input permits the HM51(S)4260C to be packaged in standard 400-mil 40-pin plastic SOJ and standard 400-mil 44-pin plastic TSOPII. Internal refresh timer enables HM51S4260C self refresh operation. Features - - - Single 5 V (±10%) (HM51(S)4260C-6/7/8) (±5%) (HM51(S)4260C-6R) High speed - Access time: 60 ns/70 ns/80 ns (max) Low power dissipation - Active mode: 825 m W/788 m W/770 m W/688 m W (max) - Standby mode: 11 m W (max) (HM51(S)4260C-6/7/8) 10.5 m W (max) (HM51(S)4260C-6R) 1.1 m W (max) (L-version) (HM51(S)4260C-6/7/8) 1.05 m W (max) (L-version) (HM51(S)4260C-6R) Fast page mode capability 512 refresh cycles: 8 ms 128 ms (L-version) 2 CAS -byte control 2 variations of refresh - RAS -only refresh - CAS -before-RAS refresh Battery backup operation (L-version) Self refresh operation (HM51S4260C) - - - - - - HM514260C, HM51S4260C Series Ordering Information Type No. HM514260CJ-6 HM514260CJ-6R HM514260CJ-7 HM514260CJ-8 HM514260CLJ-6 HM514260CLJ-6R HM514260CLJ-7 HM514260CLJ-8 HM51S4260CJ-6 HM51S4260CJ-6R HM51S4260CJ-7 HM51S4260CJ-8 HM51S4260CLJ-6 HM51S4260CLJ-6R HM51S4260CLJ-7 HM51S4260CLJ-8 HM514260CTT-6 HM514260CTT-6R HM514260CTT-7 HM514260CTT-8 HM514260CLTT-6 HM514260CLTT-6R HM514260CLTT-7 HM514260CLTT-8 HM51S4260CTT-6 HM51S4260CTT-6R HM51S4260CTT-7 HM51S4260CTT-8 HM51S4260CLTT-6 HM51S4260CLTT-6R HM51S4260CLTT-7 HM51S4260CLTT-8 Access Time 60 ns 60 ns 70 ns 80 ns 60 ns 60 ns 70 ns 80 ns 60 ns 60 ns 70 ns 80 ns 60 ns 60 ns 70 ns 80 ns 60 ns 60 ns 70 ns 80 ns 60 ns 60 ns 70 ns 80 ns 60 ns 60 ns 70 ns 80 ns 60 ns 60 ns 70 ns 80 ns 400-mill 44-pin plastic TSOP II (TTP-44/40DB) Package 400-mill 40-pin plastic SOJ...