HM62256B Datasheet | Hitachi Semiconductor

Description The Hitachi HM62256B Series is a CMOS static RAM organized 32,768-word × 8-bit. It realizes higher performance and low power consumption by employing 0.8 µm Hi-CMOS process technology. The device, packaged in 8 × 14 mm TSOP, 8 × 13.4 mm TSOP with thickness of 1.2 mm, 450 mil SOP (foot print pitch width), 600 mil plastic DIP, or 300 mil plastic DIP, is available for high density mounting. It offers low power standby power dissipation; therefore, it is suitable for battery backup systems. Features - Single 5.0 V supply: 5.0 V ± 10% - Access time: 55 ns/70 ns/85 ns (max) - Power dissipation:  Active: 25 m W (typ) (f = 1 MHz)  Standby: 1.0 µW (typ) - pletely static memory  No clock or timing strobe required - Equal access and cycle times - mon data input and output  Three state output - Directly TTL patible all inputs and outputs - Battery backup operation HM62256B Series Ordering Information Type No. HM62256BLP-7 HM62256BLP-7SL HM62256BLSP-7 HM62256BLSP-7SL HM62256BLFP-7T HM62256BLFP-5SLT HM62256BLFP-7SLT HM62256BLFP-7ULT HM62256BLT-8 HM62256BLT-7SL HM62256BLTM-8 HM62256BLTM-5SL HM62256BLTM-7SL HM62256BLTM-7UL Access time 70 ns 70 ns 70 ns 70 ns 70 ns 55 ns 70 ns 70 ns 85 ns 70 ns 85 ns 55 ns 70 ns 70 ns 8 mm × 13.4 mm 28-pin TSOP (TFP-28DA) 8 mm × 14 mm 32-pin TSOP (TFP-32DA) 450-mil 28-pin plastic SOP (FP-28DA) 300-mil 28-pin plastic DIP (DP-28NA) Package 600-mil 28-pin plastic DIP (DP-28) Pin Arrangement HM62256BLP/BLFP/BLSP Series A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 (Top view) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A13 A8 A9 A11 OE A10 CS I/O7 I/O6 I/O5 I/O4 I/O3 HM62256B Series Pin Arrangement (cont.) HM62256BLT Series OE A11 NC A9 A8 A13 WE VCC A14 A12 A7 A6 A5 NC A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) HM62256BLTM Series OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A10 CS NC I/O7 I/O6 I/O5 I/O4 I/O3 VSS I/O2 I/O1...