HM628128DI Datasheet | Hitachi Semiconductor

Description The Hitachi HM628128DI Series is 1-Mbit static RAM organized 131,072-kword × 8-bit. HM628128DI Series has realized higher density, higher performance and low power consumption by employing Hi-CMOS process technology. The HM628128DI Series offers low power standby power dissipation; therefore, it is suitable for battery backup systems. It has package variations of standard 32-pin plastic DIP, standard 32-pin plastic SOP. Features - Single 5 V supply: 5 V ± 10% - Access time: 70 ns (max) - Power dissipation  Active: 30 m W/MHz (typ)  Standby: 10 µW (typ) - pletely static memory.  No clock or timing strobe required - Equal access and cycle times - mon data input and output  Three state output - Directly TTL patible all inputs - Battery backup operation  2 chip selection for battery backup - Temperature range: - 40 to +85°C Preliminary: The specification of this device are subject to change without notice. Please contact your nearest Hitachi’s Sales Dept. regarding specification. HM628128DI Series Ordering Information Type No. HM628128DLPI-7 HM628128DLFPI-7 Access time 70 ns 70 ns Package 600-mil 32-pin plastic DIP (DP-32) 525-mil 32-pin plastic SOP (FP-32D) HM628128DI Series Pin Arrangement 32-pin DIP/SOP NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 CS2 WE A13 A8 A9 A11 OE A10 CS1 I/O7 I/O6 I/O5 I/O4 I/O3 Pin Description Pin name A0 to A16 I/O0 to I/O7 CS1 CS2 WE OE VCC VSS NC Function Address input Data input/output Chip select 1 Chip select 2 Write enable Output enable Power supply Ground No connection HM628128DI Series Block Diagram LSB A12 A7 A6 A5 A4 A3 A2 A1 A0 A10 MSB Row decoder - - - - - VCC VSS Memory matrix 512 x 2,048 I/O0 Input data control I/O7 - - Column I/O Column decoder - -...