HI-6110 Description
The HI-6110 is a CMOS integrated circuit implementing the MIL-STD-1553 (1553) data munications protocol between a host processor and a dual redundant 1553 data bus. The single chip architecture has a digital section containing all necessary logic and memory to process and store the mand and data words for one plete 1553 message. The analog section includes dual transceivers coupled to the 1553 buses through external...
HI-6110 Key Features
- Monolithic CMOS technology 3.3V operation Exceptionally low power On-chip message buffering Selectable master clock freq
- pliant to MIL-STD-1553B Notice 2 and MIL-STD-1760 Stores Management