GENERAL DESCRIPTION
The device operates at a frequency of up to 60 MHz with a Flash accelerator to obtain maximum efficiency. The device provides 32 KB of embedded Flash memory for code/data storage and 8 KB of embedded SRAM memory for system operation and application program usage. A variety of peripherals, such as Hardware Divider DIV, PDMA, ADC, OPA, PGA, CMP, I2C, UART, SPI, MCTM, GPTM, SCTM, BFTM, CRC-16/32, 96-bit Unique ID, LSTM, WDT, SW-DP (Serial Wire Debug Port), etc., are also implemented in the device. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications. The device also includes a gate-driver for 3-phase motor driving applications. The gate-driver has a VCC Power Supply Input Under Voltage Lock-Out protection function and provides an integrated 5 V low quiescent current LDO which can provide power supply. The above features ensure that the device is suitable for use in neck/shoulder massagers, floor fans, pumps, fans and so on.