H1A424M167
Key Features
- 5 - - PIN DEFINITION
- 7 - SYSTEM DIAGRAM
- 10 - - VIDEO PROCESSING ENGINE - FUNCTIONAL DESCRIPTION
- Host Parallel Interface
- Serial or Parallel Interface selection
- CLOCK(MCLK, PCLK, VCLK) TIMING DIAGRAM
- VIDEO OUTPUT INTERFACE
- RELATIONS BETWEEN INPUT VIDEO TIMING AND OUTPUT VIDEO TIMING
- 20 - REGISTER DESCRIPTION
- REGISTERS MNEMONIC TABLE
