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H55S2532JFR-A3M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O

This page provides the datasheet information for the H55S2532JFR-A3M, a member of the H55S2622JFR-60M 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O family.

Product Overview

Hynix Semiconductor

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H55S2532JFR-A3M 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O by Hynix Semiconductor - Datasheet Preview — Datasheet preview – H55S2532JFR-A3M

Datasheet Details

Part number	H55S2532JFR-A3M
Manufacturer	Hynix Semiconductor
File Size	1.25 MB
Description	256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
Datasheet	H55S2532JFR-A3M Datasheet
Additional preview pages of the H55S2532JFR-A3M datasheet.

H55S2532JFR-A3M Product details

Description

and is subject to change without notice.

Hynix does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK).

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Other Datasheets by Hynix Semiconductor

H55S2532JFR-60M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
H55S2532JFR-75M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
H55S2562JFR-60M - 256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O
H55S2562JFR-75M - 256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O
H55S2562JFR-A3M - 256MBit MOBILE SDR SDRAM based on 4M x 4Bank x16 I/O
H55S2622JFR-60M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
H55S2622JFR-75M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O
H55S2622JFR-A3M - 256MBit MOBILE SDR SDRAMs based on 2M x 4Bank x32 I/O

Published: May 3, 2010 |