Datasheet Details
| Part number | H5TQ2G63DFR-xxJ |
|---|---|
| Manufacturer | SK Hynix |
| File Size | 580.26 KB |
| Description | 2Gb DDR3 SDRAM |
| Datasheet | H5TQ2G63DFR-xxJ H5TQ2G63DFR-xxL Datasheet (PDF) |
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Overview: 2Gb DDR3 SDRAM 2Gb DDR3 SDRAM Lead-Free&Halogen-Free (RoHS pliant) H5TQ2G83DFR-xxC H5TQ2G63DFR-xxC H5TQ2G83DFR-xxI H5TQ2G63DFR-xxI H5TQ2G83DFR-xxJ H5TQ2G63DFR-xxJ H5TQ2G83DFR-xxL H5TQ2G63DFR-xxL * SK Hynix reserves the right to change products or specifications without notice. Rev. 1.1 / May. 2012 1 http://.. Revision History Revision No. 0.01 0.02 0.03 0.04 0.05 0.06 0.07 History Preliminary version release Add temperature information in feature update operation frequency update IDD 1600,1866,2133 update IDD data update IDD data (x8) update Pakage Dimension (x16) - Corrected Pakage Dimension (Page 34 , 78 Balls to 96Balls) update IDD data Official Version Release Official Version Release & Add L/J Part Delete ments regarding IDD6TC & New revised logo (Hynix to SK hynix) Draft Date July. 2011 Aug. 2011 Oct. 2011 Nov. 2011 Nov. 2011 Dec. 2011 Dec. 2011 Remark Preliminary Preliminary Preliminary Preliminary Preliminary Preliminary Preliminary 0.08 0.09 1.0 1.1 Feb.2012 Mar.2012 Apr.2012 May.2012 Page 24, all IDD specs are pleted Deleted “Preliminary” Add L/J Part support Page 12/17/24 Rev. 1.1 / May.
This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | H5TQ2G63DFR-xxJ |
|---|---|
| Manufacturer | SK Hynix |
| File Size | 580.26 KB |
| Description | 2Gb DDR3 SDRAM |
| Datasheet | H5TQ2G63DFR-xxJ H5TQ2G63DFR-xxL Datasheet (PDF) |
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The H5TQ2G83DFR-xxC, H5TQ2G63DFR-xxC,H5TQ2G83DFR-xxI, H5TQ2G63DFR-xxI, H5TQ2G83DFRxxL,H5TQ2G63DFR-xxL,H5TQ2G83DFR-xxJ,H5TQ2G63DFR-xxJ are a 2,147,483,648-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth.
SK Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock.
While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it.
| Part Number | Description |
|---|---|
| H5TQ2G63DFR-xxC | 2Gb DDR3 SDRAM |
| H5TQ2G63DFR-xxI | 2Gb DDR3 SDRAM |
| H5TQ2G63DFR-xxL | 2Gb DDR3 SDRAM |
| H5TQ2G63BFR-xxC | 2Gb DDR3 SDRAM |
| H5TQ2G63BFR-xxI | 2Gb DDR3 SDRAM |
| H5TQ2G63BFR-xxJ | 2Gb DDR3 SDRAM |
| H5TQ2G63FFR-xxC | 2Gb DDR3 SDRAM |
| H5TQ2G63FFR-xxI | 2Gb DDR3 SDRAM |
| H5TQ2G63FFR-xxJ | 2Gb DDR3 SDRAM |
| H5TQ2G63FFR-xxL | 2Gb DDR3 SDRAM |