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H5TQ4G83BMR-xxC - 4Gb DDR3 SDRAM

Download the H5TQ4G83BMR-xxC datasheet PDF. This datasheet also covers the H5TQ4G43BMR-xxC variant, as both devices belong to the same 4gb ddr3 sdram family and are provided as variant models within a single manufacturer datasheet.

General Description

The H5TQ4G43BMR-xxC, H5TQ4G83BMR-xxC are a 4,294,967,296-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth.

Key Features

  • and Ordering Information.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (H5TQ4G43BMR-xxC-HynixSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
H5TQ4G83CFR-xxC 4Gb DDR3 SDRAM Hynix
H5TQ4G83CFR-xxI 4Gb DDR3 SDRAM Hynix
H5TQ4G83CFR-xxJ 4Gb DDR3 SDRAM Hynix
H5TQ4G83CFR-xxL 4Gb DDR3 SDRAM Hynix
H5TQ4G83MFR-xxC 4Gb DDR3 SDRAM Hynix

Other Datasheets by SK Hynix

Part Number Description
H5TQ4G83AFR-xxC 4Gb DDR3 SDRAM
H5TQ4G83AFR-xxI 4Gb DDR3 SDRAM
H5TQ4G83AFR-xxJ 4Gb DDR3 SDRAM
H5TQ4G83AFR-xxL 4Gb DDR3 SDRAM
H5TQ4G83AMR-xxC 4Gb DDR3 SDRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
4Gb DDR3 SDRAM 4Gb DDR3 SDRAM Lead-Free&Halogen-Free (RoHS Compliant) H5TQ4G43BMR-xxC H5TQ4G83BMR-xxC * Hynix Semiconductor reserves the right to change products or specifications without notice. Rev. 0.2 / Jun. 2010 1 Revision History Revision No. 0.1 0.2 History Initial Release Corrected typo on row and column address table Draft Date Apr. 2010 Jun. 2010 Remark Rev. 0.2 / Jun. 2010 2 Description The H5TQ4G43BMR-xxC, H5TQ4G83BMR-xxC are a 4,294,967,296-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock.