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HY5DU561622AT Datasheet (hy5du56xx22a(l)t) 256m-s Ddr Sdram

Manufacturer: SK Hynix

Overview: .. HY5DU56422A(L)T HY5DU56822A(L)T HY5DU561622A(L)T 256M-S DDR SDRAM HY5DU56422A(L)T HY5DU56822A(L)T HY5DU561622A(L)T .

General Description

and is subject to change without notice.

Hynix semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Key Features

  • VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS).
  • All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock Programmable CAS latency 1.5, 2, 2.5 an.

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