HY5DU561622CT - (HY5DU56xx22CT) 256M-P DDR SDRAM

This page provides the datasheet information for the HY5DU561622CT, a member of the HY5DU56422CT (HY5DU56xx22CT) 256M-P DDR SDRAM family.

Product Overview

Hynix Semiconductor

Part number	HY5DU561622CT
Manufacturer	Hynix Semiconductor
File Size	267.11 KB
Description	(HY5DU56xx22CT) 256M-P DDR SDRAM
Datasheet	HY5DU561622CT Datasheet
Additional preview pages of the HY5DU561622CT datasheet.

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VDD/VDDQ = 2.5 ~ 2.7V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has two bytewide data strobes (UDQS, LDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) On chip DLL align D.

Other Datasheets by Hynix Semiconductor

HY5DU561622CF - (HY5DU56xxxC(L)F) 256M DDR SDRAM
HY5DU561622AT - (HY5DU56xx22A(L)T) 256M-S DDR SDRAM
HY5DU561622DT - (HY5DU56xx22DT) 256Mb DDR SDRAM
HY5DU561622DTP - (HY5DU56x22DTP) 256M DDR SDRAM
HY5DU561622E - (HY5DU56822E / HY5DU561622E) 256Mb DDR SDRAM
HY5DU561622EFP - (HY5DU561622EFP / HY5DU56822EFP) 256Mb DDR SDRAM
HY5DU561622ELFP - (HY5DU561622EFP / HY5DU56822EFP) 256Mb DDR SDRAM
HY5DU561622ELTP - (HY5DU56822E / HY5DU561622E) 256Mb DDR SDRAM

Published: Mar 21, 2007 |