HY5PS12421F Datasheet | SK Hynix

description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.0/ Feb. 2005 1 1HY5PS12421(L)F HY5PS12821(L)F HY5PS121621(L)F Revision History Rev. 0.0 0.1 0.2 Preliminary Changed Some Description & IDD Spec Editorial clean up, Fixed CL3~6 & AL0~5, Defined IDD Specifications, Added Package outline, added Self-Refresh High temperature Entry, changed t RAS spec. for DDR2 400 Transfered Functional description , mand truth table pages and Some contents of Operating conditions to <Device Operation> Modified IDD specifications. Changed IDD Spec.(IDD2P & IDD6) History Draft Date Apr.2003 Jun. 2003 Dec. 2003 Jul. 2004 Nov. 2004 Feb. 2005 Rev. 1.0 / Feb. 2005 1HY5PS12421(L)F HY5PS12821(L)F HY5PS121621(L)F Contents 1. Description 1.1 Device Features and Ordering Information 1.1.1 Key Feaures 1.1.2 Ordering Information 1.1.3 Ordering Frequency 1.2 Pin configuration 1.3 Pin Description 2. Maximum DC ratings 2.1 Absolute Maximum DC Ratings 2.2 Operating Temperature Condition 3. AC & DC Operating Conditions 3.1 DC Operating Conditions 5.1.1 Remended DC Operating Conditions(SSTL_1.8) 5.1.2 ODT DC Electrical Characteristics 3.2 DC & AC Logic Input Levels 3.2.1 Input DC Logic Level 3.2.2 Input AC Logic Level 3.2.3 AC Input Test Conditions 3.2.4 Differential Input AC Logic Level 3.2.5 Differential AC output parameters 3.3 Output Buffer Levels 3.3.1 Output AC Test Conditions 3.3.2 Output DC Current Drive 3.3.3 OCD default chracteristics 3.4 IDD Specifications & Measurement Conditions 3.5 Input/Output Capacitance 4. AC Timing Specifications 5. Package Dimensions Rev. 1.0 / Feb. 2005 1HY5PS12421(L)F HY5PS12821(L)F HY5PS121621(L)F 1. Description 1.1 Device Features & Ordering Information 1.1.1 Key Features - - - - - - - - - - - - - - - - - - - - - - - - - VDD=1.8V VDDQ=1.8V +/- 0.1V All inputs and outputs are patible with SSTL_18 interface Fully...