HY5PS1G831F
description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 0.2 / Apr. 2004 1
..
HY5PS1G431(L)F HY5PS1G831(L)F Revision Details
Revision No. 0.1 0.2 History Preliminary Corrected typos of Pin description
& t RFC spec. , Added IDD spec. Draft Date Feb.2004 Apr.2004 Remark Initial Release
Rev 0.2 / Apr. 2004
..
HY5PS12421(L)F HY5PS12821(L)F HY5PS121621(L)F
Contents
1. Description
1.1 Device Features and Ordering Information 1.1.1 Key Feaures 1.1.2 Ordering Information 1.1.3 Ordering Frequency 1.2 Pin configuration 1.2.1 256M × 4 DDR2 Pin Configuration 1.2.2 128M × 8 DDR2 Pin Configuration 1.3 Pin Description
2. Functioanal Description
2.1 Simplified State Diagram 2.2 Functional Block Diagram 2.2.1 Functional Block Diagram(256M × 4) 2.2.2 Functional Block Diagram(128M × 8) 2.3 Basic Function & Operation of DDR2 SDRAM 2.3.1 Power up and Initialization 2.3.2 Programming...
