Datasheet Details
| Part number | HYMP112S64CP6 |
|---|---|
| Manufacturer | SK Hynix |
| File Size | 557.48 KB |
| Description | 1200pin Unbuffered DDR2 SDRAM SO-DIMMs |
| Datasheet |
 HYMP112S64CP6 Datasheet
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General Description
and is subject to change without notice.
Hynix Semiconductor does not assume any responsibility for use of circuits described.
No patent licenses are implied.
Key Features
- JEDEC standard Double Data Rate 2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply.
- All inputs and outputs are compatible with SSTL_1.8 interface.
- Posted CAS Programmable CAS Latency 3 ,4 ,5, and 6 OCD (Off-Chip Driver Impedance Adjustment) and ODT (On-Die Termination).
- Fully differential clock operations (CK & CK).
- Programmable Burst Length 4 / 8 with both sequential and inte.