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HMP125S6EFR8C-Y5 Datasheet

200pin Unbuffered Ddr2 Sdram So-dimms

Manufacturer: SK Hynix

This datasheet includes multiple variants, all published together in a single manufacturer document.

HMP125S6EFR8C-Y5 Overview

and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.

HMP125S6EFR8C-Y5 Key Features

  • JEDEC standard Double Data Rate 2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply
  • All inputs and outputs are patible with SSTL_1.8 interface
  • Posted CAS Programmable CAS Latency 3,4,5, and 6 OCD (Off-Chip Driver Impedance Adjustment) and ODT (On-Die Termination)
  • Fully differential clock operations (CK & CK)
  • 67.60 x 30.00 mm form factor RoHS pliant & Halogen-free
  • This product is in pliance with the directive pertaining of RoHS

More Datasheets from SK Hynix

See all SK Hynix datasheets

Part Number Description
HMP125S6EFR8C-C4 200pin Unbuffered DDR2 SDRAM SO-DIMMs
HMP125S6EFR8C-S5 200pin Unbuffered DDR2 SDRAM SO-DIMMs
HMP125S6EFR8C-S6 200pin Unbuffered DDR2 SDRAM SO-DIMMs
HMP125F7EFR8C-S5 240pin Fully Buffered DDR2 SDRAM DIMMs
HMP125F7EFR8C-S6D3 240pin Fully Buffered DDR2 SDRAM DIMMs
HMP125F7EFR8C-S6D5 240pin Fully Buffered DDR2 SDRAM DIMMs
HMP125F7EFR8C-Y5 240pin Fully Buffered DDR2 SDRAM DIMMs
HMP125F7EFR8C-Y5N3 240pin Fully Buffered DDR2 SDRAM DIMMs
HMP112F7EFR8C-S5 240pin Fully Buffered DDR2 SDRAM DIMMs
HMP112F7EFR8C-S6D3 240pin Fully Buffered DDR2 SDRAM DIMMs

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