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AiP74HC595 Datasheet Serial Or Parallel-out Shift Register

Manufacturer: I-CORE

Overview: Wuxi I-CORE Electronics Co., Ltd. Tab: 835-12 rev:B3 Number:AiP74HC/HCT595-AX-LJ-A026EN i-core AiP74HC/HCT595 8-bit Serial-in, Serial or Parallel-out Shift Register with Output Latches; 3-state Product Specification.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

2012-06-A1 2012-06 New 2021-09-A2 2021-09 Modify Ordering Information 2021-12-A3 2021-12 Modify Ordering Information 2022-01-A4 2022-01 Modify ambient temperature to -40℃~+105℃ and add electrical characteristics of -40℃~+105℃ 2022-08-A5 2022-08 Modify the tube packing specifications of SOP16/TSSOP16;

Modify package information;

Modify ambient temperature to -40℃~+125℃ 2022-09-A6 2022-09 Modify the value range of VIL;

Key Features

  • a serial input.
  • (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage i-core.
  • register. Data in t.

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