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IBM0436A41BLAB Datasheet

(ibm04xxax1blab) 8mb And 4mb Sram

Manufacturer: IBM Corporation

This datasheet includes multiple variants, all published together in a single manufacturer document.

IBM0436A41BLAB Overview

Differential K clocks are used to initiate the read/write operation and all internal operations are self-timed. At the rising edge of the K clock, all Addresses, Write-Enables, Sync Select, and Data Ins are registered internally. Data Outs are updated from output registers off the next rising edge of the K clock.

IBM0436A41BLAB Key Features

  • 0.25 Micron CMOS technology
  • Synchronous Pipeline Mode of Operation with Self-Timed Late Write
  • Single Differential HSTL Clock
  • +2.5V Power Supply, Ground, 1.5, 1.8V VDDQ, and 0.90V VREF
  • HSTL Input and Output levels
  • Registered Addresses, Write Enables, Synchronous Select, and Data Ins
  • Registered Outputs
  • mon I/O
  • Asynchronous Output Enable
  • Synchronous Power Down Input

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