Datasheet4U Logo Datasheet4U.com

ICS432I-101 - DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

Datasheet Summary

Description

The ICS8432I-101 is a general purpose, dual output Differential-to-3.3V LVPECL high frequency HiPerClockS™ synthesizer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS.

The ICS8432I-101 has a selectable TEST_CLK or CLK, nCLK inputs.

Features

  • Dual differential 3.3V LVPECL outputs.
  • Selectable CLK, nCLK or LVCMOS/LVTTL TEST_CLK.
  • TEST_CLK can accept the following input levels: LVCMOS or LVTTL.
  • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL.
  • CLK, nCLK or TEST_CLK maximum input frequency: 40MHz.
  • Output frequency range: 25MHz to 700MHz.
  • VCO range: 250MHz to 700MHz.
  • Accepts any single-ended input signal on CLK input.

📥 Download Datasheet

Datasheet preview – ICS432I-101

Datasheet Details

Part number ICS432I-101
Manufacturer ICS
File Size 194.21 KB
Description DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Datasheet download datasheet ICS432I-101 Datasheet
Additional preview pages of the ICS432I-101 datasheet.
Other Datasheets by ICS

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS8432I-101 700MHZ, DIFFERENTIAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER FEATURES • Dual differential 3.3V LVPECL outputs • Selectable CLK, nCLK or LVCMOS/LVTTL TEST_CLK • TEST_CLK can accept the following input levels: LVCMOS or LVTTL • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • CLK, nCLK or TEST_CLK maximum input frequency: 40MHz • Output frequency range: 25MHz to 700MHz • VCO range: 250MHz to 700MHz • Accepts any single-ended input signal on CLK input with resistor bias on nCLK input • Parallel interface for programming counter and output dividers • RMS period jitter: 5ps (maximum) • Cycle-to-cycle jitter: 25ps (maximum) • 3.
Published: |