ICS889874 Datasheet PDF (DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER)

ICS889874 - DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER

Datasheet Summary

Description

The ICS889874 is a high speed 1:2 Differentialto-LVPECL Buffer/Divider and is a member of HiPerClockS™ the HiPerClockS ™ family of high performance clock solutions from ICS.

Features

2 LVPECL outputs.
Frequency divide select options: ÷ 1, ÷ 2, ÷4, ÷8, ÷16.
IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML.
Output frequency: > 2.5GHz.
Output skew: 5ps (typical).
Part-to-part skew: TBD.
Additive jitter, RMS:.

Datasheet Details

Part number	ICS889874
Manufacturer	ICS
File Size	190.89 KB
Description	DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER
Datasheet	ICS889874 Datasheet
Additional preview pages of the ICS889874 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com PRELIMINARY Integrated Circuit Systems, Inc. ICS889874 1:2 DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER FEATURES • 2 LVPECL outputs • Frequency divide select options: ÷ 1, ÷ 2, ÷4, ÷8, ÷16 • IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML • Output frequency: > 2.5GHz • Output skew: 5ps (typical) • Part-to-part skew: TBD • Additive jitter, RMS: <0.03ps (design target) • Supply voltage range: (LVPECL), 2.375V to 3.465V Supply voltage range: (ECL), -3.465V to -2.375V • -40°C to 85°C ambient operating temperature • Pin compatible with SY89874U GENERAL DESCRIPTION The ICS889874 is a high speed 1:2 Differentialto-LVPECL Buffer/Divider and is a member of HiPerClockS™ the HiPerClockS ™ family of high performance clock solutions from ICS.

Published: Oct 2, 2007 |