ICS ICS952623
The internal clocks are disabled and the VCO and the crystal are stopped. The latency of the power down will not be greater than 1.8ms.| Part No. | ICS952623 |
|---|---|
| Datasheet | ICS952623 Download |
| Manufacturer |  ICS |
| Description | Programmable Timing Control Hub |
| Buy | Stock & Price |
FEATURES
:● 3 - 0.7V current-mode differential CPU pairs
● 1 - 0.7V current-mode differential SRC pair
● 7 - PCI (33MHz)
● 3 - PCICLK_F, (33MHz) free-running
● 1 - USB, 48MHz
● 1 - DOT, 48MHz
● 2 - REF, 14.318MHz
● 4 - 3V66, 66.66MHz
● 1 - VCH/3V66, selectable 48MHz or 66MHz Key Specifications:
● CPU/SRC outputs cycle-cycle jitter < 125ps
● 3V66 outputs cycle-cycle jitter < 250ps
● PCI outputs cycle-cycle jitter < 250ps
● CPU outputs skew: < 100ps
● +/- 300ppm frequency accuracy on CPU & SRC clocks
FEATURES
/Benefits:● Supports tight ppm accuracy clocks for Serial-ATA
● Supports spread spectrum modulation, 0 to -0.5% down spread and +/- 0.25% center spread
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● Supports CPU clks up to 400MHz in test mode Uses external 14.318MHz crystal Supports undriven differential CPU, SRC pair in PD# and CPU_STOP# for power management. Pin Configuration Functionality CPU SRC 3V66 PCI REF USB/DOT B6b5 FS_A FS_B MHz MHz MHz MHz MHz MHz 0 0 100 100/200 66.66 33.33 14.318 48.00 0 MID Ref/N0 Ref/N1 Ref/...
