ICS552-03 Datasheet | ICST

.. LOW SKEW 1 TO 8 CLOCK BUFFER (4 AT 1X, 4 AT 1/2X) Description The ICS552-03 is a low skew, single input to eight output clock buffer. Four of the outputs are exact copies of the input, while the other four are divide by 2 copies of the input. It is part of ICS’ Clock Blocks TM family. See the ICS553 for a 1 to 4 low skew buffer, or the ICS552-02 for a 1 to 8 low skew buffer without divide by 2. For more than 8 outputs see the MK74CBxxx Buffalo TM series of clock drivers. ICS makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features - - - - - - - - - - Low skew outputs (50 ps maximum) Packaged in 16 pin TSSOP Low power CMOS technology Operating Voltages of 2.5 V to 5 V Output Enable pin tri-states outputs Low skew between 1X and 1/2X outputs (100 ps maximum) One bank of 4 outputs at 1X One bank of 4 outputs at 1/2X 5V tolerant input clocks Input clock multiplexer Block Diagram Q0 IN A 1 Q1 Q2 Q3 P0 P1 P2 P3 IN B D ivid e by 2 S E LA MDS 552-03 B In tegr ated C ir cu it S yst ems q 5 25 Ra ce Str eet, San Jose, C A 95 126 q Revision 052501 tel ( 408) 2 95-9 800 q . i c s t. c om ICS552-03 LOW SKEW 1 TO 8 CLOCK BUFFER (4 AT 1X, 4 AT 1/2X) Pin Assignment OE VDD Q0 Q1 Q2 Q3 GND INB 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SELA VDD P3 P2 P1 P0 GND INA Input Source Select SELA 0 1 Input INB INA 16 Pin 173 Mil (0.65mm) TSSOP Pin...