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ICS554-01 - LOW SKEW 1 TO 4 CLOCK BUFFER

General Description

The ICS554-01 is a low skew clock buffer with a single complimentary PECL input to four PECL outputs.

Part of ICS’ Clock BlocksTM family, this is our lowest skew PECL clock buffer.

Key Features

  • Outputs are skew matched to within 50ps Packaged in 16 pin TSSOP One PECL input to 4 PECL output clock drivers Operating Voltages of 3.3V to 5V Block Diagram VDD 62Ω 62Ω IN IN 270Ω Q0 270Ω Q0 VDD 62Ω 62Ω Q1 VDD 62Ω 62Ω 270Ω 270Ω Q1 Q2 270Ω 270Ω Q2 VDD 62Ω 62Ω Q3 VDD 1.1kΩ 0.01mF 270Ω 270Ω Q3 RES MDS 554-01 A In tegr ated C ir cu it S y st ems G 1 5 25 Ra ce Str eet, San Jose, C A 95 126 G Revision 031901 tel ( 408) 2 95-9 800 G www. i c s t.

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Datasheet Details

Part number ICS554-01
Manufacturer ICST
File Size 108.85 KB
Description LOW SKEW 1 TO 4 CLOCK BUFFER
Datasheet download datasheet ICS554-01 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com P R E L I M I N A RY I N F O R M AT I O N ICS554-01 LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT Description The ICS554-01 is a low skew clock buffer with a single complimentary PECL input to four PECL outputs. Part of ICS’ Clock BlocksTM family, this is our lowest skew PECL clock buffer. For parts which do not require PECL inputs or outputs, see the ICS553 for a 1 to 4 low skew buffer, or the ICS552-02 for a 1 to 8 low skew buffer. For more than 8 outputs see the MK74CBxxx BuffaloTM series of clock drivers. ICS makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.