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ICS557-06 - ONE TO FOUR HCSL CLOCK BUFFER

General Description

The ICS557-06 is a one to four differential clock buffer designed for use in PCI-Express applications.

The device selects one of the two differential HCSL or LVDS input pairs and fans out to four pairs of differential HCSL or LVDS outputs.

Key Features

  • Packaged in 20-pin TSSOP Available in Pb (lead) free package Operating voltage of 3.3 V Low power consumption Input differential clock of up to 200 MHz for HCSL and up to 100 MHz for LVDS.
  • Jitter 100 ps (peak-to-peak).
  • Output-to-output skew of 50 ps Block Diagram VDD 2 OE CLKA CLKA IN1 IN1 IN2 IN2 MUX 2 to 1 CLKB CLKB CLKC CLKC CLKD CLKD 2 SEL GND PD Rr (IREF) MDS 557-06 C I n t e gra te d C i r c u i t S y s t e m s.

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Datasheet Details

Part number ICS557-06
Manufacturer ICST
File Size 231.74 KB
Description ONE TO FOUR HCSL CLOCK BUFFER
Datasheet download datasheet ICS557-06 Datasheet

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www.DataSheet4U.com ICS557-06 ONE TO FOUR HCSL CLOCK BUFFER Description The ICS557-06 is a one to four differential clock buffer designed for use in PCI-Express applications. The device selects one of the two differential HCSL or LVDS input pairs and fans out to four pairs of differential HCSL or LVDS outputs. Features • • • • • Packaged in 20-pin TSSOP Available in Pb (lead) free package Operating voltage of 3.