ICST ICS557-06
The ICS557-06 is a one to four differential clock buffer designed for use in PCI-Express applications. The device selects one of the two differential HCSL or LVDS input pairs and fans out to four pairs of differential HCSL or LVDS outputs. c o m ICS557-06 One to Four HCSL Clock Buffer Application Information Decoupling Capacitors As with any high-performance mixed-signal IC, the ICS557-06 must be isolated from system power supply noise to perform optimally.| Part No. | ICS557-06 |
|---|---|
| Datasheet | ICS557-06 Download |
| Manufacturer |  ICST |
| Description | ONE TO FOUR HCSL CLOCK BUFFER |
| Buy | Stock & Price |
DESCRIPTION
FEATURES
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● Packaged in 20-pin TSSOP Available in Pb (lead) free package Operating voltage of 3.3 V Low power consumption Input differential clock of up to 200 MHz for HCSL and up to 100 MHz for LVDS
● Jitter 100 ps (peak-to-peak)
● Output-to-output skew of 50 ps Block Diagram VDD 2 OE CLKA CLKA IN1 IN1 IN2 IN2 MUX 2 to 1 CLKB CLKB CLKC CLKC CLKD CLKD 2 SEL GND PD Rr (IREF) MDS 557-06 C I n t e gra te d C i r c u i t S y s t e m s
● 1 525 Race Stre et, San Jo se, CA 9 5126
● Revision 010306 te l (40 8) 2 97-12 01
● w w w. i c st . c o m ICS557-06 One to Four HCSL Clock Buffer Pin Assignment SEL VDDIN IN1 IN1 PD IN2 IN2 OE GND IREF 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 CLKA CLKA CLKB CLKB GND VDD CLKC CLKC CLKD CLKD Select Table SEL 0 1 Input Pair selected IN2/ IN2 IN1/ IN1 20-pin (173 mil) TSSOP Pin Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin Name SEL VDDIN IN1 IN1 PD IN2 IN2 OE GND Rr(IREF) CLKD CLKD CLKC CLKC VDDOUT GND CLKB...
