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ICS8530I-01 - LVPECL FANOUT BUFFER

Datasheet Summary

Description

The ICS8530I-01 is a low skew, 1-to-16 Differential-to-3.3V LVPECL Fanout Buffer and a memHiPerClockS™ ber of the HiPerClockS™ family of High Performance Clock Solutions from ICS.

The CLK, nCLK pair can accept most standard differential input levels.

Features

  • (16) differential 3.3V LVPECL outputs.
  • CLK, nCLK input pair.
  • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL.
  • Maximum output frequency: 500MHz.
  • Translates any single-ended input signal to 3.3V LVPECL levels with a resistor bias on nCLK input.
  • Output skew: 50ps (typical).
  • Part-to-part skew: 100ps (typical).
  • Additive phase jitter, RMS @ 106.25MHz: 0.022ps (typical) @ 25°C.

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Datasheet preview – ICS8530I-01

Datasheet Details

Part number ICS8530I-01
Manufacturer ICST
File Size 290.00 KB
Description LVPECL FANOUT BUFFER
Datasheet download datasheet ICS8530I-01 Datasheet
Additional preview pages of the ICS8530I-01 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com PRELIMINARY Integrated Circuit Systems, Inc. ICS8530I-01 LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER FEATURES • (16) differential 3.3V LVPECL outputs • CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 500MHz • Translates any single-ended input signal to 3.3V LVPECL levels with a resistor bias on nCLK input • Output skew: 50ps (typical) • Part-to-part skew: 100ps (typical) • Additive phase jitter, RMS @ 106.25MHz: 0.022ps (typical) @ 25°C • 3.3V output operating supply • -40°C to 85°C ambient operating temperature GENERAL DESCRIPTION The ICS8530I-01 is a low skew, 1-to-16 Differential-to-3.
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