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ICS8532-01 - LVPECL FANOUT BUFFER

Description

The ICS8532-01 is a low skew, 1-to-17, Differential-to-3.3V LVPECL Fanout Buffer and a HiPerClockS™ member of the HiPerClockS™ family of High Performance Clock Solutions from ICS.

The ICS8532-01 has two selectable clock inputs.

The CLK, nCLK pair can accept most standard differential input levels.

Features

  • 17 differential 3.3V LVPECL outputs.
  • Selectable CLK, nCLK or LVPECL clock inputs.
  • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL.
  • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL.
  • Maximum output frequency up to 500MHz.
  • Translates any single-ended input signal (LVCMOS, LVTTL, GTL) to 3.3V LVPECL levels with resistor bias on nCLK input.
  • Output skew: 50ps (maximum).

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Datasheet preview – ICS8532-01

Datasheet Details

Part number ICS8532-01
Manufacturer ICST
File Size 179.49 KB
Description LVPECL FANOUT BUFFER
Datasheet download datasheet ICS8532-01 Datasheet
Additional preview pages of the ICS8532-01 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS8532-01 LOW SKEW, 1-TO-17 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER FEATURES • 17 differential 3.3V LVPECL outputs • Selectable CLK, nCLK or LVPECL clock inputs • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL • Maximum output frequency up to 500MHz • Translates any single-ended input signal (LVCMOS, LVTTL, GTL) to 3.3V LVPECL levels with resistor bias on nCLK input • Output skew: 50ps (maximum) • Part-to-part skew: 250ps (maximum) • Propagation delay: 2.5ns (maximum) • 3.
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