6168LA70DB Datasheet | IDT

Features IDT6168SA IDT6168LA High-speed (equal access and cycle time) - Military: 25/45ns (max.) - Industrial: 25ns (max.) - mercial: 15/20/25ns (max.) x Low power consumption x Battery backup operation- 2V data retention voltage .. (IDT6168LA only) x Available in high-density 20-pin ceramic or plastic DIP and 20-pin leadless chip carrier (LCC) x Produced with advanced CMOS high-performance technology x CMOS process virtually eliminates alpha particle soft-error rates x Bidirectional data input and output x Military product pliant to MIL-STD-883, Class B x Description The IDT6168 is a 16,384-bit high-speed static RAM organized as 4K x 4. It is fabricated using l DT’s high-performance, high-reliability CMOS technology. This state-of-the-art technology, bined with innovative circuit design techniques, provides a cost-effective approach for high-speed memory applications. Access times as fast 15ns are available. The circuit also offers a reduced power standby mode. When CS goes HIGH, the circuit will automatically go to, and remain in, a standby mode as long as CS remains HIGH. This capability provides significant system-level power and cooling savings. The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1µW operating off a 2V battery. All inputs and outputs of the IDT6168 are TTL-patible and operate from a single 5V supply. The IDT6168 is packaged in either a space saving 20-pin, 300-mil ceramic or plastic DIP or a 20-pin LCC providing high board-level packing densities. Military grade product is manufactured in pliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. Functional Block Diagram A0 VCC GND ADDRESS DECODER A11 16,384-BIT MEMORY ARRAY I/O0 I/O1 I/O2 I/O3 I/O CONTROL INPUT DATA CONTROL , CS WE 3090 drw 01 FEBRUARY 2001 ©2000 Integrated Device Technology,...