71P71204S250BQ8 Overview
The IDT DDRIITM Burst of two SRAMs are high-speed synchronous memories with a double-data-rate (DDR), bidirectional data port. This scheme allows maximization of the bandwidth on the data bus by passing two data items per clock cycle. The address bus operates at single data rate speeds, allowing the user to fan out addresses and ease system design while maintaining maximum performance on data transfers.