8312 Description
The 8312 is a low skew, 1-to-12 LVCMOS/ LVTTL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The 8312 single-ended clock input accepts LVCMOS or LVTTL input levels. The low impedance LVCMOS outputs are designed to drive 50 series or parallel terminated transmission lines.
8312 Key Features
- Twelve LVCMOS/LVTTL outputs
- CLK input supports the following input types: LVCMOS, LVTTL
- Maximum output frequency