• Part: 8P391208
  • Description: Low Additive Jitter 2:8 Buffer
  • Manufacturer: IDT
  • Size: 872.69 KB
8P391208 Datasheet (PDF) Download
IDT
8P391208

Description

8P391208 is intended to take 1 or 2 reference clocks, select between them, using a pin selection and generate up to 8 outputs that are the same as the reference frequency.

Key Features

  • Two differential inputs support LVPECL, LVDS, HCSL or LVCMOS reference clocks
  • Accepts input frequencies ranging from 1PPS (1Hz) to 700MHz (up to 1GHz when configured into HCSL output mode at 3.3V)
  • Select which of the two input clocks is to be used as the reference clock for which bank via pin selection
  • Generates 8 differential outputs
  • Differential outputs selectable as LVPECL, LVDS, CML or HCSL