Datasheet Summary
Differential-to-3.3V, 2.5V LVPECL Clock Divider and Fanout Buffer
DATA SHEET
General Description
The 8V79S674 is a clock divider and fanout buffer. The device has been designed for clock signal division in wireless base station radio equipment boards. The device is optimized to deliver excellent additive phase jitter performance. The 8V79S674 uses SiGe technology for an optimum of high clock frequency and low phase noise performance, bined with high power supply noise rejection. The device offers the frequency division by ÷1, ÷2, ÷4 and ÷8. Four low-skew LVPECL outputs are available and support clock output frequencies up to 2500MHz (÷1 frequency division). Outputs can be...