IDT 9DB433
The 9DB433 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB433 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator.| Part No. | 9DB433 |
|---|---|
| Datasheet | 9DB433 Download |
| Manufacturer |  IDT |
| Description | FOUR OUTPUT DIFFERENTIAL BUFFER |
| Buy | Stock & Price |
GENERAL DESCRIPTION
Recommended Application 4 output PCIe Gen1,2,3 zero-delay/fanout buffer Key Specifications● Output cycle-cycle jitter <50ps
● Output to Output skew <50ps
● Phase jitter: PCIe Gen3 <1.0ps rms Functional Block Diagram OE(6,1)# 2
FEATURES
/Benefits● 3 Selectable SMBus Addresses; Mulitple devices can share the same SMBus Segment
● OE# pins; Suitable for Express Card applications
● PLL or bypass mode; PLL can dejitter incoming clock
● Selectable PLL bandwidth; minimizes jitter peaking in downstream PLL's
● Spread Spectrum Compatible; tracks spreading input clock for low EMI
● SMBus Interface; unused outputs can be disabled
● Supports undriven
