9DBU0941 Key Features
- 1-167MHz Low-Power (LP) HCSL DIF pairs
- DIF additive cycle-to-cycle jitter <5ps
- DIF output-to-output skew < 60ps
- DIF additive phase jitter is <300fs rms for PCIe Gen3
- DIF additive phase jitter <350s rms for SGMII
- Direct connection to 100ohm transmission lines; save 36
- 47mW typical power consumption; eliminates thermal
- Outputs can optionally be supplied from any voltage
- Spread Spectrum