9FGU0641 Key Features
- 6 -100MHz Low-power HCSL (LP-HCSL) DIF pairs
- 1.5V LVCMOS REF output w/Wake-On-LAN (WOL)
- DIF cycle-to-cycle jitter <50ps
- DIF output-to-output skew <60ps
- DIF phase jitter is PCIe Gen1-2-3 pliant
- REF phase jitter is < 3.0ps RMS
- Direct connection to 100ohm transmission lines; saves 24
- 45mW typical power consumption; reduced thermal
- Outputs can optionally be supplied from any voltage