9FGV0631C Description
The 9FGV0631C is a member of IDT's SOC-Friendly 1.8V Very-Low-Power PCIe clock family. The device has 6 output enables for clock management, 2 different spread spectrum levels in addition to spread off and 2 selectable SMBus addresses. Remended Application 1.8V PCIe Gen 1-2-3 Clock Generator Output.
9FGV0631C Key Features
- 100MHz Low-Power (LP) HCSL DIF pairs
- 1.8V LVCMOS REF output w/Wake-On-LAN (WOL)
- DIF cycle-to-cycle jitter <50ps
- DIF output-to-output skew <50ps
- DIF phase jitter is PCIe Gen1-2-3 pliant
- REF phase jitter is <1.5ps RMS
- LP-HCSL outputs; save 12 resistors pared to standard
- 54mW typical power consumption; reduced thermal
- Outputs can optionally be supplied from any voltage
- OE# pins; support DIF power management