9ZX21901B
Overview
- 19 - 0.7V current mode differential HCSL output pairs * * * * * * * *
- External feedback path; Adjustable input-to-output delay 9 Selectable SMBus addresses/ Multiple devices can share same SMBus segment 8 dedicated OE# pins/ hardware control of outputs PLL or bypass mode/ PLL can dejitter incoming clock Selectable PLL BW/ minimizes jitter
