ICS853S024 - LVPECL FANOUT BUFFER

Product Overview

IDT

Part number	ICS853S024
Manufacturer	IDT
File Size	652.37 KB
Description	LVPECL FANOUT BUFFER
Datasheet	ICS853S024 Datasheet
Additional preview pages of the ICS853S024 datasheet.

Performance Clock Solutions from IDT.

The CLK, nCLK pair can accept most standard differential input levels.

Twenty four LVPECL outputs.
One differential clock input pair.
Differential input clock (CLK, nCLK) can accept the following signaling levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL.
Maximum output frequency: >1.5GHz.
Translates any single ended input signal to 3.3V/ 2.5V LVPECL levels with resistor bias on nCLK input.
Output skew: 25ps (typical).
t.

ICS853S006I - LVPECL/ECL Fanout Buffer (Renesas)
ICS853S012I - LVPECL Clock/Data Multiplexer (Renesas)
ICS853S014I - 3.3V LVPECL/ECL Fanout Buffer (Renesas)
ICS853S310I - 3.3V LVPECL/ECL Fanout Buffer (Renesas)
ICS853S310I - 1-to-8 Differential-to- 3.3V LVPECL/ECL Fanout Buffer (Integrated Device Technology)
ICS853S54I - Differential-to-LVPECL/ECL Multiplexer (Renesas)
ICS8530 - LVPECL FANOUT BUFFER (ICST)
ICS8530-01 - LVPECL FANOUT BUFFER (ICST)
ICS8530-01 - Differential-to-3.3V LVPECL Fanout Buffer (Integrated Device Technology)
ICS853001 - LVPECL/ECL BUFFER (ICST)

Other Datasheets by IDT

Published: Dec 21, 2016 |