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ICS8S89874I - 1:2 Differential-to-LVPECL Buffer/Divider

General Description

The ICS8S89874I is a high speed 1:2 Differential-to- LVPECL Buffer/ Divider.

The ICS8S89874I has a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider, which allows the device to be used as either a 1:2 fanout buffer or frequency divider.

Key Features

  • Two LVPECL/ECL output pairs.
  • Frequency divide select options: ÷1 (pass through), ÷2, ÷4, ÷8, ÷16.
  • IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML.
  • Output frequency: 2GHz (maximum).
  • Output skew: 15ps (maximum).
  • Part-to-part skew: 250ps (maximum).
  • Additive phase jitter, RMS: 0.20ps (typical).
  • LVPECL supply vol.

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Datasheet Details

Part number ICS8S89874I
Manufacturer IDT
File Size 680.36 KB
Description 1:2 Differential-to-LVPECL Buffer/Divider
Datasheet download datasheet ICS8S89874I Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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1:2 Differential-to-LVPECL Buffer/Divider ICS8S89874I DATA SHEET General Description The ICS8S89874I is a high speed 1:2 Differential-to- LVPECL Buffer/ Divider. The ICS8S89874I has a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider, which allows the device to be used as either a 1:2 fanout buffer or frequency divider. The clock input has internal termination resistors, allowing it to interface with several differential signal types while minimizing the number of required external components. The device is packaged in a small, 3mm x 3mm VFQFN package, making it ideal for use on space-constrained boards.