Datasheet4U Logo Datasheet4U.com

ICS9LPRS502 - 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR

General Description

3.3V PCI clock output or Clock Request control A for either SRC0 or SRC2 pair The power-up default is PCI0 output, but this pin may also be used as a Clock Request control of SRC pair 0 or SRC pair 2 via SMBus.

Key Features

  • 2 - CPU differential low power push-pull pairs 7 - SRC differential low power push-pull pairs 1 - CPU/SRC selectable differential low power push-pull pair 1 - SRC/DOT selectable differential low power push-pull pair 5 - PCI, 33MHz 1 - PCI_F, 33MHz free running 1 - USB, 48MHz 1 - REF, 14.318MHz Features/Benefits:.
  • Does not require external pass transistor for voltage.

📥 Download Datasheet

Datasheet Details

Part number ICS9LPRS502
Manufacturer IDT
File Size 315.87 KB
Description 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR
Datasheet download datasheet ICS9LPRS502 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Datasheet 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR Recommended Application: CK505 compliant clock with fully integrated voltage regulator and Internal series resistor on differential outputs, PCIe Gen 1 compliant ICS9LPRS502 Key Specifications: • • • • CPU outputs cycle-cycle jitter < 85ps SRC output cycle-cycle jitter < 125ps PCI outputs cycle-cycle jitter < 250ps +/- 100ppm frequency accuracy on CPU & SRC clocks Output Features: • • • • • • • • 2 - CPU differential low power push-pull pairs 7 - SRC differential low power push-pull pairs 1 - CPU/SRC selectable differential low power push-pull pair 1 - SRC/DOT selectable differential low power push-pull pair 5 - PCI, 33MHz 1 - PCI_F, 33MHz free running 1 - USB, 48MHz 1 - REF, 14.