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ICS9UMS9610 - PC MAIN CLOCK

Datasheet Summary

Description

IN This active-low input stops all CPU clocks that are set to be stoppable.

2 CLKPWRGD#/PD_3.3 IN ready to be sampled.

Features

  • 3 - CPU low power differential push-pull pairss.
  • 3 - SRC low power differential push-pull pairs.
  • 1 - LCD100 SSCD low power differential push-pull pair.
  • 1 - DOT96 low power differential push-pull pair.
  • 1 - REF, 14.31818MHz, 3.3V SE output Pin Configuration Advance Information ICS9UMS9610 Features/Benefits:.
  • Supports Dothan ULV CPUs with 100 to 200 MHz CPU outputs.
  • Dedicated TEST/SEL and TEST/MODE pins saves isolation resistors on p.

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Datasheet preview – ICS9UMS9610

Datasheet Details

Part number ICS9UMS9610
Manufacturer IDT
File Size 131.86 KB
Description PC MAIN CLOCK
Datasheet download datasheet ICS9UMS9610 Datasheet
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Full PDF Text Transcription

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PC MAIN CLOCK Recommended Application: Poulsbo Based Ultra-Mobile PC (UMPC) - CK610 Output Features: • 3 - CPU low power differential push-pull pairss • 3 - SRC low power differential push-pull pairs • 1 - LCD100 SSCD low power differential push-pull pair • 1 - DOT96 low power differential push-pull pair • 1 - REF, 14.31818MHz, 3.3V SE output Pin Configuration Advance Information ICS9UMS9610 Features/Benefits: • Supports Dothan ULV CPUs with 100 to 200 MHz CPU outputs • Dedicated TEST/SEL and TEST/MODE pins saves isolation resistors on pins • CPU STOP# input for power manangment • Fully integrated Vreg • Integrated series resistors on differential outputs • 1.5V VDD IO, 1.5V VDD core, 3.3V VDD supply pin for REF CPUT0_LPR CPUC0_LPR VDDIO_1.5 GNDCPU CPUT1_LPR CPUC1_LPR VDDCORE_1.
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