IDT7005L Overview
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM IDT7005S/L Features ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location ◆ Low-power operation – IDT7005S Active: 750mW (typ.) Standby: 5mW (typ.) – IDT7005L Active: 700mW (typ.) Standby: 1mW (typ.) ◆ IDT7005 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one device Functional Block Diagram CEL R/WL ◆ M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave ◆ Interrupt Flag ◆ On-chip port arbitration logic ◆ Full on-chip hardware support of semaphore signaling
IDT7005L Key Features
- True Dual-Ported memory cells which allow simultaneous reads of the same memory location
- High-speed access
- Military: 20/25/35/55/70ns (max.)
- Industrial: 20/35/55ns (max.)
- mercial:15/17/20/25/35/55ns (max.)
- Low-power operation
- IDT7005S Active: 750mW (typ.) Standby: 5mW (typ.)
- IDT7005L Active: 700mW (typ.) Standby: 1mW (typ.)
- IDT7005 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than one devi
- M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave