IDT70T3399S Overview
◆ True Dual-Port memory cells which allow simultaneous access of the same memory location ◆ Selectable Pipelined or Flow-Through output mode ◆ Counter enable and repeat features ◆ Dual chip enables allow for depth expansion without additional logic ◆ Interrupt and Collision Detection Flags ◆ Full synchronous operation on both ports – 5ns cycle time, 200MHz operation (14Gbps bandwidth) – Fast 3.4ns clock to data out – Data input, address, byte enable and control registers – 1.5ns setup to clock and 0.5ns hold on all control, data, and address inputs @ 200MHz – Self-timed write allows fast cycle time ◆ Separate byte controls for multiplexed bus and bus matching patibility ◆ Dual Cycle D
IDT70T3399S Key Features
- True Dual-Port memory cells which allow simultaneous access of the same memory location
- High-speed data access
- mercial: 3.4 (200MHz)/3.6ns (166MHz)/ 4.2ns (133MHz)(max.)
- Industrial: 3.6ns (166MHz)/4.2ns (133MHz) (max.)
- Selectable Pipelined or Flow-Through output mode
- Counter enable and repeat features
- Dual chip enables allow for depth expansion without
- Interrupt and Collision Detection Flags
- Full synchronous operation on both ports
- 5ns cycle time, 200MHz operation (14Gbps bandwidth)