IDT70T3589S Overview
BE3L ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Functional Block Diagram BE2L BE1L BE0L BE2R BE1R BE0R FT/PIPEL TDI TCK TMS TRST CE 0 L CE1 L R /WL INTERRUPT COLLISION DETECTION LOGIC CE0 R CE1 R COLR INTR COL L INTL ZZL
IDT70T3589S Key Features
- Data input, address, byte enable and control registers
- mercial: 3.4 (200MHz)/3.6ns (166MHz)/ 4.2ns (133MHz)(max.)
- Industrial: 3.6ns (166MHz)/4.2ns (133MHz) (max.) Selectable Pipelined or Flow-Through output mode Counter enable and rep
- 5ns cycle time, 200MHz operation (14Gbps bandwidth)
- Fast 3.4ns clock to data out
- 1.5ns setup to clock and 0.5ns hold on all control, data, and address inputs @ 200MHz
- I/O35L
- I/O35R