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IDT71V3556XSA Datasheet PDF

IDT IDT71V3556XSA

3.3V Synchronous ZBT SRAMs

Part No. IDT71V3556XSA
Datasheet IDT71V3556XSA Download
Manufacturer
IDT
Description 3.3V Synchronous ZBT SRAMs
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IDT71V3556XSA datasheet page 1 preview

FEATURES

● 128K x 36, 256K x 18 memory configurations
● Supports high performance system speed - 200 MHz (x18) (3.2 ns Clock-to-Data Access)
● Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access)
● ZBTTM Feature - No dead cycles between write and read cycles
● Internally synchronized output buffer enable eliminates the need to control OE
● Single R/W (READ/WRITE) control pin
● Positive clock-edge triggered address, data, and control signal registers for fully pipelined applications
● 4-word burst capability (interleaved or linear)
● Individual byte write (BW1 - BW4) control (May tie active)
● Three chip enables for simple depth expansion
● 3.3V power supply (±5%), 3.3V I/O Supply (VDDQ)
● Optional- Boundary Scan JTAG Interface (IEEE 1149.1 compliant)
● Packaged in a JEDEC st
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