IDT72261LA Datasheet PDF

IDT IDT72261LA

the IDT72281/72291 SuperSync FIFOs • 10ns read/write cycle time (8ns access time) • Fixed, low first word data latency time • Auto power down minimizes standby power consumption • Master Reset clears entire FIFO • Partial Reset clears data, but retains programmable settings • Retransmit operation with fixed, low first word data latency time • Empty, Full and Half-Full flags signal FIFO status • Programmable Almost-Empty and Almost-Full flags, each flag can default to one of two preselected offsets • Program partial flags by either serial or parallel means • Select IDT Standard timing (using...