IDT72285 - (IDT72275 / IDT72285) CMOS SUPERSYNC FIFO

This page provides the datasheet information for the IDT72285, a member of the IDT72275 (IDT72275 / IDT72285) CMOS SUPERSYNC FIFO family.

Product Overview

IDT

Part number	IDT72285
Manufacturer	IDT
File Size	259.34 KB
Description	(IDT72275 / IDT72285) CMOS SUPERSYNC FIFO
Datasheet	IDT72285 Datasheet
Additional preview pages of the IDT72285 datasheet.

The IDT72275/72285 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls.

The limitation of the frequency of one clock input with resp

Choose among the following memory organizations: IDT72275 32,768 x 18 IDT72285 65,536 x 18.
Pin-compatible with the IDT72255LA/72265LA SuperSync FIFOs.
10ns read/write cycle time (6.5ns access time).
Fixed, low first word data latency time.
Auto power down minimizes standby power consumption.
Master Reset clears entire FIFO.
Partial Reset clears data, but retains programmable settings.
Retransmit operation with fixed, low.

Other Datasheets by IDT

Published: Feb 25, 2014 |