IDT IDT74ALVC162334
This 16-bit universal bus driver is built using advanced dual metal CMOS technology. The device operates in the transparent mode when the latch-enable (LE) input is low.FEATURES
:● 0.5 MICRON CMOS Technology
● Typical tSK(o) (Output Skew) < 250ps
● ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
● VCC = 3.3V ± 0.3V, Normal Range
● VCC = 2.7V to 3.6V, Extended Range
● VCC = 2.5V ± 0.2V
● CMOS power levels (0.4μ W typ. static)
● Rail-to-Rail output swing for increased noise margin
● Available in TSSOP package
DESCRIPTION
: Data flow from A to Y is controlled by the output-enable (OE) input. When LE is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is high, the A data is stored in the latch/flip-flop on