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IDT74ALVC162836 Datasheet PDF

IDT IDT74ALVC162836

This 20-bit universal bus driver is built using advanced dual metal CMOS technology. The device operates in the transparent mode when the latch-enable (LE) input is low.
Part No. IDT74ALVC162836
Datasheet IDT74ALVC162836 Download
Manufacturer
IDT
Description 3.3V CMOS 20-BIT UNIVERSAL BUS DRIVER
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IDT74ALVC162836 datasheet page 1 preview

FEATURES

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DESCRIPTION

: IDT74ALVC162836
● 0.5 MICRON CMOS Technology
● Typical tSK(o) (Output Skew) < 250ps
● ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
● VCC = 3.3V ± 0.3V, Normal Range
● VCC = 2.7V to 3.6V, Extended Range
● VCC = 2.5V ± 0.2V
● CMOS power levels (0.4µ W typ. static)
● Rail-to-Rail output swing for increased noise margin
● Available in SSOP and TSSOP packages Data flow from A to Y is controlled by the output-enable (OE) input. When LE is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is high, the outputs are in the high-impedance state. The ALVC162836 has series resistors in the device output structure which will significantly reduce line noise when used with light loads. This driver has been designed to drive ±12mA at the designated threshold levels. DRIVE

FEATURES

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● Light Bala...
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