Datasheet4U Logo Datasheet4U.com

IDT74FCT162511AT - FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER

This page provides the datasheet information for the IDT74FCT162511AT, a member of the IDT74FCT162511 FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER family.

Datasheet Summary

Description

The FCT162511AT/CT 16-bit registered/latched transceiver with parity is built using advanced dual metal CMOS technology.

Features

  • 0.5 MICRON CMOS Technology.
  • Typical tsk(o) (Output Skew) < 250ps, clocked mode.
  • Low input and output leakage ≤1µA (max).
  • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0).
  • Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack.
  • Extended commercial range of.
  • 40°C to +85°C.
  • VCC = 5V ±10%.
  • Balanced Output Drivers: ±24mA (commercial).

📥 Download Datasheet

Datasheet preview – IDT74FCT162511AT

Datasheet Details

Part number IDT74FCT162511AT
Manufacturer IDT
File Size 204.86 KB
Description FAST CMOS 16-BIT REGISTERED/LATCHED TRANSCEIVER
Datasheet download datasheet IDT74FCT162511AT Datasheet
Additional preview pages of the IDT74FCT162511AT datasheet.

📁 Similar Datasheet

Other Datasheets by IDT

Full PDF Text Transcription

Click to expand full text
Integrated Device Technology, Inc. FAST CMOS 16-BIT IDT54/74FCT162511AT/CT REGISTERED/LATCHED TRANSCEIVER WITH PARITY FEATURES: • 0.5 MICRON CMOS Technology • Typical tsk(o) (Output Skew) < 250ps, clocked mode • Low input and output leakage ≤1µA (max) • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.
Published: |