Datasheet4U Logo Datasheet4U.com

IDT74SSTU32865 - 28-BIT 1:2 REGISTERED BUFFER

Datasheet Summary

Description

APPLICATIONS: Along with CSPU877/A/D DDR2 PLL, provides complete solution for DDR2 DIMMs

The SSTU32865 is a 28-bit 1:2 configurable registered buffer designed for 1.7V to 1.9V VDD operation.

Features

  • 1.8V Operation SSTL_18 style clock and data inputs Differential CLK input Control inputs compatible with LVCMOS levels Flow-through architecture for optimum PCB design Latch-up performance exceeds 100mA ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0).
  • Available in 160-pin CTBGA package.

📥 Download Datasheet

Datasheet preview – IDT74SSTU32865

Datasheet Details

Part number IDT74SSTU32865
Manufacturer IDT
File Size 244.14 KB
Description 28-BIT 1:2 REGISTERED BUFFER
Datasheet download datasheet IDT74SSTU32865 Datasheet
Additional preview pages of the IDT74SSTU32865 datasheet.

📁 Similar Datasheet

Other Datasheets by IDT

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.com IDT74SSTU32865 28-BIT 1:2 REGISTERED BUFFER WITH PARITY COMMERCIAL TEMPERATURE RANGE 28-BIT 1:2 REGISTERED BUFFER WITH PARITY IDT74SSTU32865 FEATURES: • • • • • • • 1.8V Operation SSTL_18 style clock and data inputs Differential CLK input Control inputs compatible with LVCMOS levels Flow-through architecture for optimum PCB design Latch-up performance exceeds 100mA ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0) • Available in 160-pin CTBGA package DESCRIPTION: APPLICATIONS: • Along with CSPU877/A/D DDR2 PLL, provides complete solution for DDR2 DIMMs • Optimized for DDR2-400/533 (PC2-3200/4300) JEDEC Raw Card D The SSTU32865 is a 28-bit 1:2 configurable registered buffer designed for 1.7V to 1.9V VDD operation.
Published: |