IDT74SSTU32D869 Overview
This device supports low-power standby operation. When the reset input (RESET) is low, the differential input receivers are disabled, and undriven (floating) data, clock, and reference voltage (VREF) inputs are allowed. In addition, when RESET is low all registers are reset, and all outputs are forced low.
IDT74SSTU32D869 Key Features
- Available in 150-pin CTBGA package
IDT74SSTU32D869 Applications
- Along with CSPU877/A/D DDR2 PLL, provides plete solution for DDR2 DIMMs
- Optimized for DDR2-400/533 [PC2-3200/4300] Raw card L