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IDT74SSTU32D869 - 14-BIT 1:2 REGISTERED BUFFER

General Description

This device supports low-power standby operation.

When the reset input (RESET) is low, the differential input receivers are disabled, and undriven (floating) data, clock, and reference voltage (VREF) inputs are allowed.

Key Features

  • 1.8V Operation Designed to drive low impedance nets SSTL_18 style clock and data inputs Differential CLK input Control inputs compatible with LVCMOS levels Center input architecture for optimum PCB design Latch-up performance exceeds 100mA ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0).
  • Available in 150-pin CTBGA package.

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Datasheet Details

Part number IDT74SSTU32D869
Manufacturer IDT
File Size 249.12 KB
Description 14-BIT 1:2 REGISTERED BUFFER
Datasheet download datasheet IDT74SSTU32D869 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com IDT74SSTU32D869 14-BIT 1:2 REGISTERED BUFFER WITH PARITY COMMERCIAL TEMPERATURE RANGE 14-BIT 1:2 REGISTERED BUFFER WITH PARITY IDT74SSTU32D869 FEATURES: • • • • • • • • 1.8V Operation Designed to drive low impedance nets SSTL_18 style clock and data inputs Differential CLK input Control inputs compatible with LVCMOS levels Center input architecture for optimum PCB design Latch-up performance exceeds 100mA ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0) • Available in 150-pin CTBGA package APPLICATIONS: • Along with CSPU877/A/D DDR2 PLL, provides complete solution for DDR2 DIMMs • Optimized for DDR2-400/533 [PC2-3200/4300] Raw card L The SSTU32D869 is a 14-bit 1:2 configurable registered buffer designed for 1.7V to 1.